In this episode of TechTalk with Tom Griffin, Tom gives a great overview of CTS’ Miniature Low Noise PLL Timing Modules.
CTS, a world leader in frequency technology, announces a new family of phase-lock-loop or PLL, timing modules to address the need for a small size, high performance, and low-cost jitter attenuator in applications that require exceptionally clean timing signals.
Applications such as fiber-optics, communication systems, test and measurement, radar systems, MRI, and digital video all benefit from this technology intended to reduce the magnitude of jitter or undesired deviation from an ideal timing signal within wireless communication between devices.
As technology continues to evolve, demand has increased for high-speed data transmissions. This requires equipment manufacturers to design hardware that is capable of operating at higher transmission bit rates, thus transmitting data quickly to accommodate trends such as streaming video or GPS based applications.
- The PLL is a complete integrated custom ASIC solution designed to reduce jitter or synthesize low frequency to high frequency up to 650MHz.
- The PLL module requires no customer programming and is a miniature 9mm x 14mm x 3mm package
- Outputs available are: 3.3 LVPECL, LVDS or HCMOS
By utilizing a single ASIC, CTS was able to eliminate multiple other active components previously required to achieve comparable levels of performance. As a result, CTS now offers a best-in-class solution that not only achieves small size, high performance, and low-cost objectives but also offers faster time to market and faster prototyping to manufacturers.
If you would like to learn more about CTS and their exciting new products, visit their website at: https://www.ctscorp.com/cts-introduces-new-miniature-low-noise-pll-timing-modules/
